IMS Presents at the 2020 Advanced Semiconductor Manufacturing Conference
IMS Center PhD Researcher Haoshu (Sherry) Cai presented in the Advanced Process Control Track at the 2020 Advanced Semiconductor Manufacturing Conference (ASMC). The presentation, titled A Framework for Semi-Automated Fault Detection Configuration with Automated Feature Extraction and Limits Setting, is based on a paper co-written with Michael Armacost, James Moyne, and Jimmy Iskandar from IMS member company Applied Materials, as well as fellow IMS personnel Jay Lee, Jianshe Feng, and Fei Li. The research that informed this presentation and paper were supported directly by Applied Materials—we thank them for their continued support and collaboration.
The abstract for this paper can be read below and the full-text can be accessed here.
Abstract
In today’s microelectronics manufacturing facilities, fault detection (FD) is pervasive as the primary advanced process control (APC) capability in use. The current approach to FD, while effective, has a number of shortcomings that impact its cost and effectiveness. The highest among these is the cost in time and resources associated with the largely manual methods used for partitioning and extraction of features of interest in individual traces. Additionally, once these features are extracted, feature-based univariate analysis (UVA) is the primary method used for process monitoring and FD, which fails to incorporate process variable correlations in detecting faults and quality issues. On the other hand, current multivariate analysis (MVA) approaches, such as principal component analysis (PCA), partial least squares (PLS), and their variants, focus on threshold setting in a multivariate space so that they cannot provide direct limit settings on raw (sensor) parameters for decision-making support during online process monitoring. Also, in bypassing feature identification and extraction, the subject matter expert (SME) is largely left out of the loop in MVA analysis; thus, information on the relationship between univariate features and faults is not captured. Furthermore, it is difficult to visualize and understand multivariate limits due to the high dimensionality of the data produced in microelectronics manufacturing processes. Finally, slow and normal process changes often occur in real processes, which can lead to false alarms during implementation when using models trained from offline samples. Thus, a need exists for an FD method that leverages the existing feature-based UVA and provides (1) a method for automated signal partitioning and feature extraction that allows for SME input, (2) an MVA mechanism which considers correlation among parameters and is adaptive to the normal process drift, (3) an automatic approach for limiting UVA features that captures the correlation among parameters, and (4) a methodology for easily viewing these capabilities so that an SME is able to view, understand, and continue to contribute to the FD optimization process. This capability has been developed and successfully applied to microelectronics manufacturing data sets and is proposed as a key component to future microelectronics smart manufacturing systems
About ASMC
ASMC is the leading international technical conference for discussing solutions that improve the collective manufacturing expertise of the semiconductor industry. Solving the challenges presented by semiconductor manufacturing is a combined effort by device makers, equipment and materials suppliers, and academics. ASMC provides an unparalleled platform for semiconductor professionals to network and learn the latest in the practical application of advanced manufacturing strategies and methodologies. Technical presentations at ASMC highlight industry innovations with specific results and are published by IEEE, with select manuscripts republished in the ASMC Special Section of IEEE Transactions on Semiconductor Manufacturing.
To learn more about the Center's work in Semiconductor Manufacturing, please visit our publications page here.
